Loading...

Proceedings of

International Conference on Advanced Computing, Communication and Networks CCN 2011

"A STUDY AND COMPARISON OF LOW POWER CMOS VOLTAGE REFERENCE"

MANOJ KUMAR ASHOK KUMAR SANDEEP K. ARYA
DOI
10.15224/978-981-07-1847-3-1027
Pages
689 - 692
Authors
3
ISBN
978-981-07-1847-3-1027

Abstract: “This paper presents a study and comparison between CMOS low power voltage reference in terms of voltage independent over the temperature .The reference voltage circuits are designed & simulated in SPICE with 0.35-μm technology with supply voltage (VDD) of 2.5 V & 1.8 V respectively. The simulated results show that the circuits generate an average reference voltage of 246.66 mV & 817.0 mV respectively and there is only small variation of ±2 mV & ±0.2 mV from the temperature range of -40 °C to 120 °C. The circuits consume approximately 10.49 μW & 69.8 μW of power dissipation from a supply voltage of 2.5 V & 1.8- V respectively.”

Keywords: Study, Comparison of Low Power CMOS Voltage Reference

Download PDF