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Proceedings of
1st International Conference on Advances in Computer, Electronics and Electrical Engineering CEEE 2012
"ANALYSIS OF 20NM SOI MOSFET SRAM DESIGN USING DIFFERENT GATE MATERIALS"
I.FLAVIA PRINCESS NESAMANI
V.LAKSHMIPRABHA
DOI
10.15224/978-981-07-1847-3-471
Pages
77 - 81
Authors
2
ISBN
978-981-07-1847-3
Abstract: “The SOI MOSFET technique is used to overcome the scaling effects. In this work, 20nm SOI MOSFET using Poly silicon as gate material of both N-type and P-type were designed. The same SOI MOSFET is designed using Molybdenum as gate material for both N-type and P-type and the device characteristics werecompared and analysed”
Keywords: SOI-Silicon On Insulator, SNM-Static Noise Margin, S-Sub threshold Sl