Abstract: “This paper presents a lumped RF model of high voltage FET applicable for the frequency up to GHz range. Unlike the compact MOSFET model, the proposed solution contains not only parasitic capacitances and resistances but also parasitic inductance. The signal delay caused by relatively large device area including the parasitic resonance modeled by distributed RLC network is considered. The model is applicable in commercial SPICE simulators, e.g. Eldo, Spectre or HSpice.”

Keywords: SPICE model, MOSFET, RF, parasitic, RLC network, high frequency, GHz, simulation